摘 要
直接数字频率合成(Direct Digital Synthesis，DDS)是20世纪60年代末出现的第三代频率合成技术，该技术从相位概念出发，以时域采样定理为基础，在时域中进行频率合成，它以可编程逻辑器件(CPLD)作为控制及数据处理的核心，可将波形数据用D/A转换器快速恢复。基于CPLD和DDS技术的函数发生器可以实现信号波形的多样化，同时大大提高输出信号的带宽。
整个设计采用MAX+ plus II开发平台，VHDL编程实现，基于可编程逻辑器件CPLD设计多波形信号发生器。用VHDL编程实现，其设计过程简单，极易修改，可移植性强。系统以CPLD为核心，采用直接数字合成技术，辅以必要的模拟电路，构成一个波形稳定，精度较高的函数信号发生器。系统的特色在于除晶体振荡器和A/D转换外，全部集成在一片CPLD芯片上，使系统大大简化。它可输出频率、幅度可调的正弦波、三角波、方波。另外由于CPLD具有可编程重置特性，因而可以方便地更换波形数据，且简单易行，带来极大方便。
关键词：信号发生器设计；三相；VHDL；CPLD；MAX+ plus II
ABSTRACT
Direct digital frequency synthesize(DDFS) is a recently and rapidly developed technology which features high frequency resolution．This paper briefly introduces the basic principle of DDS. The basic principle and performance of CPLD chip．Then it mainly describes how to use CPLD chip to design a function generator of high accuracy．The principle of three-phase multi-signal generator based on CPLD and DDS technology is introduced．Based on these，the modules of CPLD design are given．
The multi-wave signal generator is designed based on program-mable logical component CPLD．The VHDL programming realization and the MAX+ plus II development platform. Besides the crystal oscillator and the A/D transformation，the entire system completely integrates on the CPLD chip．The multi-wave signal generator may output the sine-wave，the triangle-wave，the square-wave．Then downloaded under the situation which the entire system hardware connects do not change，and finally output the special profile which user needs．The multi-wave signal generator generates wave which the conventional function signal generators can’t make．Moreover because of the programmable reset feature of the CPLD，the generator can change the wave data conveniently and practice easily．The whole design realizes by the VHDL programmer．Its design process has simple feature，easy modification and high transportation．
Keywords：Signal Generator Design；Three-phase；VHDL；CPLD；MAX+ plus II
目 录
1 引 言………………………………………………………………………………………………………………… 1
2基于CPLD的三相多波形函数发生器设计……………………………………………………………. 3
2.1 波形发生器系统的设计方法及其技术指标………………………. 3
2.1.1设计方式概述…………………………………………………………………………………… 3
2.1.2 三相函数多波形发生器技术指标……………………………………………………… 5
2.1.3三相波形发生器设计方法概述………………………………………………………….. 5
2.2 设计方案……………………………………………….. 6
2.2.1 三相函数发生器设计原理………………………………………………………………… 6
2.2.2 多波形发生器的各个波形模块设计方式简介……………………………………. 9
2.3 调试部分………………………………………………. 12
2.3.1 CPLD在使用中遇到的问题……………………………………………………………. 12
2.3.2 控制电路的调试…………………………………………………………………………….. 13
2.3.3 DAC电路的调试……………………………………………………………………………… 13
2.3.4 程序的调试………………………………………………………………………………….. 13
2.3.5 硬件电路的调试…………………………………………………………………………….. 13
结 论………………………………………………………………………………………………………………….. 15
参考文献……………………………………………………………………………………………………………. 16
附录1 三相多波形函数发生器各模块的程序………………………………………………………. 17
附录2 元件介绍…………………………………………………………………………………………………. 23
1 DAC0832…………………………………………………. 23
2 LM324…………………………………………………… 24
3 PM7128SLC84-15芯片………………………………………. 25
附录3电路原理图………………………………………………………………………………………………. 26
附录4 英文资料及译文………………………………………………………………………………………. 27
1英文资料………………………………………………… 27
2英文译文………………………………………………… 36
致 谢………………………………………………………………………………………………………………….. 43
